RL78/G15 CHAPTER 23 ELECTRICAL SPECIFICATIONS (T
A
= −40 to +85°C)
R01UH0959EJ0110 Rev.1.10 Page 722 of 765
Mar 7, 2023
(4) Simplified I
2
C mode
[T
A
= −40 to +85°C, 2.4 V ≤ V
DD
≤ 5.5 V, V
SS
= 0 V]
Item Symbol Condition MIN. MAX. Unit
SCLr clock frequency f
SCL
C
b
= 100 pF, R
b
= 3 kΩ 400
Note 1
kHz
Hold time when SCLr = “L” t
LOW
C
b
= 100 pF, R
b
= 3 kΩ 1150 ns
Hold time when SCLr = “H” t
HIGH
C
b
= 100 pF, R
b
= 3 kΩ 1150 ns
Data setup time (reception) t
SU:DAT
C
b
= 100 pF, R
b
= 3 kΩ 1/f
MCK
+ 145
Note 2
ns
Data hold time (transmission) t
HD:DAT
C
b
= 100 pF, R
b
= 3 kΩ 0 355 ns
Note 1. The value must also be no greater than f
MCK
/4.
Note 2. Set f
MCK
so that it will not exceed the hold time when SCLr = “L” or SCLr = “H”.
Caution Select the N-ch open drain output (V
DD
tolerance) mode for the SDAr pin by using port output mode
register 0, 2, or 4 (POM0, 2, or 4).
Simplified I
2
C mode connection diagram
RL78
microcontroller
User device
SDAr
SCLr
SDA
SCL
V
DD
R
b
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