3.3.2 General-purpose registers ................................................................................................... 68
3.3.3 ES and CS registers ............................................................................................................ 69
3.3.4 Special function registers (SFRs) ........................................................................................ 70
3.3.5 Extended special function registers (2nd SFRs: 2nd Special Function Registers) ............. 73
3.4 Instruction Address Addressing ...................................................................................................... 78
3.4.1 Relative addressing ............................................................................................................. 78
3.4.2 Immediate addressing .......................................................................................................... 79
3.4.3 Table indirect addressing ..................................................................................................... 80
3.4.4 Register indirect addressing ................................................................................................ 80
3.5 Addressing for Processing Data Addresses ................................................................................... 81
3.5.1 Implied addressing ............................................................................................................... 81
3.5.2 Register addressing ............................................................................................................. 82
3.5.3 Direct addressing ................................................................................................................. 83
3.5.4 Short direct addressing ........................................................................................................ 84
3.5.5 SFR addressing ................................................................................................................... 85
3.5.6 Register indirect addressing ................................................................................................ 86
3.5.7 Based addressing ................................................................................................................ 87
3.5.8 Based indexed addressing ................................................................................................... 91
3.5.9 Stack addressing.................................................................................................................. 92
3.6 Illegal Memory Access Detection Function ..................................................................................... 95
CHAPTER 4 PORT FUNCTIONS .................................................................................. 97
4.1 Port Functions ................................................................................................................................. 97
4.2 Port Configuration ........................................................................................................................... 97
4.2.1 Port 0 .................................................................................................................................... 98
4.2.2 Port 2 .................................................................................................................................... 98
4.2.3 Port 4 .................................................................................................................................... 98
4.2.4 Port 12 .................................................................................................................................. 99
4.2.5 Port 13 .................................................................................................................................. 99
4.3 Registers Controlling Port Function .............................................................................................. 100
4.3.1 Port mode registers 0, 2, 4, 12 (PM0, PM2, PM4, PM12) ................................................. 103
4.3.2 Port registers 0, 2, 4, 12, 13 (P0, P2, P4, P12, P13) ......................................................... 105
4.3.3 Pull-up resistor option registers 0, 2, 4, 12 (PU0, PU2, PU4, PU12) ................................. 107
4.3.4 Port input mode registers 0, 2, 4 (POM0, POM2, POM4).................................................. 109
4.3.5 Port mode control registers 0, 2 (PMC0, PMC2) ............................................................... 110
4.3.6 Peripheral I/O redirection registers 0 to 3 (PIOR0 to PIOR3) ............................................ 111
4.4 Port Function Operations .............................................................................................................. 115
4.4.1 Writing to I/O port ............................................................................................................... 115
4.4.2 Reading from I/O port ........................................................................................................ 115
4.4.3 Operations on I/O port ....................................................................................................... 115
4.5 Register Settings When Using Alternate Function ....................................................................... 116
4.5.1 Basic concept when using alternate function ..................................................................... 116