Renesas RL78/G15

4.5.2 Register settings for alternate function whose output function is not used ....................... 117
4.5.3 Register setting examples for used port and alternate functions ....................................... 118
4.6 Cautions When Using Port Function ............................................................................................ 127
4.6.1 Cautions on 1-bit manipulation instruction for port register n (Pn) .................................... 127
4.6.2 Notes on specifying the pin settings .................................................................................. 128
CHAPTER 5 CLOCK GENERATOR ............................................................................ 129
5.1 Functions of Clock Generator ....................................................................................................... 129
5.2 Configuration of Clock Generator ................................................................................................. 131
5.3 Registers Controlling Clock Generator ......................................................................................... 133
5.3.1 Clock operation mode control register (CMC) ................................................................... 134
5.3.2 System clock control register (CKC) .................................................................................. 135
5.3.3 Clock operation status control register (CSC) ................................................................... 136
5.3.4 Oscillation stabilization time counter status register (OSTC) ............................................ 138
5.3.5 Oscillation stabilization time select register (OSTS) .......................................................... 140
5.3.6 Peripheral enable register 0 (PER0) .................................................................................. 142
5.3.7 Operation speed mode control register (OSMC) ............................................................... 144
5.3.8 High-speed on-chip oscillator frequency select register (HOCODIV) ................................ 145
5.3.9 High-speed on-chip oscillator trimming register (HIOTRM) ............................................... 146
5.4 System Clock Oscillator ................................................................................................................ 147
5.4.1 X1 oscillator (16-pin and 20-pin products only) ................................................................. 147
5.4.2 High-speed on-chip oscillator ............................................................................................. 150
5.4.3 Low-speed on-chip oscillator ............................................................................................. 150
5.5 Clock Generator Operation ........................................................................................................... 150
5.6 Controlling Clock ........................................................................................................................... 152
5.6.1 Example of setting high-speed on-chip oscillator .............................................................. 152
5.6.2 Example of setting X1 oscillation clock .............................................................................. 153
5.6.3 CPU clock status transition diagram .................................................................................. 154
5.6.4 Condition before changing CPU clock and processing after changing CPU clock ............ 157
5.6.5 Time required for switchover of CPU clock and main system clock .................................. 158
5.6.6 Conditions before clock oscillation is stopped ................................................................... 158
5.7 Resonator and Oscillator Constants ............................................................................................. 159
CHAPTER 6 TIMER ARRAY UNIT .............................................................................. 160
6.1 Functions of Timer Array Unit ....................................................................................................... 162
6.1.1 Independent channel operation function ............................................................................ 162
6.1.2 Simultaneous channel operation function .......................................................................... 165
6.1.3 8-bit timer operation function (channels 1 and 3 only) ....................................................... 167
6.2 Configuration of Timer Array Unit ................................................................................................. 168
6.2.1 Timer count register mn (TCRmn) ..................................................................................... 173
6.2.2 Timer data register mn (TDRmn) ....................................................................................... 175
6.3 Registers Controlling Timer Array Unit ......................................................................................... 177