EasyManua.ls Logo

Altera Cyclone IV - Logic Elements

Altera Cyclone IV
490 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
CYIV-51002-1.0
© 2009 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos
are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as
trademarks or service marks are the property of their respective holders as described at www.altera.com/common/legal.html. Altera warrants performance of its
semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any products and
services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service
described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device specifications before relying
on any published information and before placing orders for products or services.
Cyclone IV Device Handbook,
Volume 1
November 2009
Feedback Subscribe
ISO
9001:2008
Registered
2. Logic Elements and Logic Array Blocks
in Cyclone IV Devices
This chapter contains feature definitions for logic elements (LEs) and logic array
blocks (LABs). Details are provided on how LEs work, how LABs contain groups of
LEs, and how LABs interface with the other blocks in Cyclone
®
IV devices.
Logic Elements
Logic elements (LEs) are the smallest units of logic in the Cyclone IV device
architecture. LEs are compact and provide advanced features with efficient logic
usage. Each LE has the following features:
A four-input look-up table (LUT), which can implement any function of four
variables
A programmable register
A carry chain connection
A register chain connection
The ability to drive the following interconnects:
Local
Row
Column
Register chain
Direct link
Register packing support
Register feedback support
November 2009
CYIV-51002-1.0

Table of Contents

Related product manuals