Altera Cyclone IV - 9-Bit Multipliers

4–6 Chapter 4: Embedded Multipliers in Cyclone IV Devices
Operational Modes
Cyclone IV Device Handbook, February 2010 Altera Corporation
Volume 1
9-Bit Multipliers
You can configure each embedded multiplier to support two 9 × 9 independent
multipliers for input widths of up to 9 bits.
Figure 4–4 shows the embedded multiplier configured to support two 9-bit
multipliers.
All 9-bit multiplier inputs and results are independently sent through registers. The
multiplier inputs can accept signed integers, unsigned integers, or a combination of
both. Two 9 × 9 multipliers in the same embedded multiplier block share the same
signa and signb signal. Therefore, all the Data A inputs feeding the same embedded
multiplier must have the same sign representation. Similarly, all the
Data B inputs
feeding the same embedded multiplier must have the same sign representation.
Figure 4–4. 9-Bit Multiplier Mode
CLRN
DQ
ENA
Data A 0 [8..0]
Data B 0 [8..0]
aclr
clock
ena
signa
signb
CLRN
DQ
ENA
CLRN
DQ
ENA
Data Out 0 [17..0]
9 × 9 Multiplier
Embedded Multiplier
CLRN
DQ
ENA
Data A 1 [8..0]
Data B 1 [8..0]
CLRN
DQ
ENA
CLRN
DQ
ENA
Data Out 1 [17..0]
9 × 9 Multiplier