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Altera Cyclone IV - Method 1: Using Logical_Channel_Address to Reconfigure Specific Transceiver Channels

Altera Cyclone IV
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3–14 Chapter 3: Cyclone IV Dynamic Reconfiguration
Dynamic Reconfiguration Modes
Cyclone IV Device Handbook, November 2011 Altera Corporation
Volume 2
There are three methods that you can use to dynamically reconfigure the PMA
controls of a transceiver channel:
“Method 1: Using logical_channel_address to Reconfigure Specific Transceiver
Channels” on page 3–14
“Method 2: Writing the Same Control Signals to Control All the Transceiver
Channels” on page 3–16
“Method 3: Writing Different Control Signals for all the Transceiver Channels at
the Same Time” on page 3–19
Method 1: Using logical_channel_address to Reconfigure Specific
Transceiver Channels
Enable the
logical_channel_address
port by selecting the Use
‘logical_channel_address’ port option on the Analog controls tab. This method is
applicable only for a design where the dynamic reconfiguration controller controls
more than one channel.
You can additionally reconfigure either the receiver portion, transmitter portion, or
both the receiver and transmitter portions of the transceiver channel by setting the
corresponding value on the
rx_tx_duplex_sel
input port. For more information, refer
to Table 3–2 on page 3–4.
Connecting the PMA Control Ports
The selected PMA control ports remain fixed in width, regardless of the number of
channels controlled by the ALTGX_RECONFIG instance:
tx_vodctrl
and
tx_vodctrl_out
are fixed to 3 bits
tx_preemp
and
tx_preemp_out
are fixed to 5 bits
rx_eqdcgain
and
rx_eqdcgain_out
are fixed to 2 bits
rx_eqctrl
and
rx_eqctrl_out
are fixed to 4 bits
Write Transaction
To complete a write transaction, perform the following steps:
1. Set the selected PMA control ports to the desired settings (for example,
tx_vodctrl
= 3'b001).
2. Set the
logical_channel_address
input port to the logical channel address of the
transceiver channel whose PMA controls you want to reconfigure.
3. Set the
rx_tx_duplex_sel
port to 2'b10 so that only the transmit PMA controls are
written to the transceiver channel.
4. Ensure that the
busy
signal is low before you start a write transaction.
5. Assert the
write_all
signal for one
reconfig_clk
clock cycle.
The
busy
output status signal is asserted high to indicate that the dynamic
reconfiguration controller is busy writing the PMA control values. When the write
transaction has completed, the
busy
signal goes low.

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