Chapter 2: Cyclone IV Reset Control and Power Down 2–21
Power Down
September 2014 Altera Corporation Cyclone IV Device Handbook,
Volume 2
As shown in Figure 2–12, perform the following reset procedure when using the
dynamic reconfiguration controller to change the configuration of the transceiver
channel:
1. After power up and establishing that the transceiver is operating as desired, write
the desired new value in the appropriate registers (including
reconfig_mode_sel[2:0]
) and subsequently assert the
write_all
signal (marker
1) to initiate the dynamic reconfiguration.
f For more information, refer to the Cyclone IV Dynamic Reconfiguration
chapter.
2. Assert the
tx_digitalreset
,
rx_analogreset
, and
rx_digitalreset
signals.
3. As soon as
write_all
is asserted, the dynamic reconfiguration controller starts to
execute its operation. This is indicated by the assertion of the
busy
signal (marker
2).
4. Wait for the assertion of the
channel_reconfig_done
signal (marker 4) that
indicates the completion of dynamic reconfiguration in this mode.
5. Deassert the
tx_digitalreset signal
(marker 5). This signal must be deasserted
after assertion of the
channel_reconfig_done
signal (marker 4) and before the
deassertion of the
rx_analogreset
signal (marker 6).
6. Wait for at least five parallel clock cycles after assertion of the
channel_reconfig_done
signal (marker 4) to deassert the
rx_analogreset
signal
(marker 6).
7. Lastly, wait for the
rx_freqlocked
signal to go high. After
rx_freqlocked
goes
high (marker 7), wait for t
LTD_Auto
to deassert the
rx_digitalreset
signal (marker
8). At this point, the receiver is ready for data traffic.
Power Down
The Quartus II software automatically selects the power-down channel feature, which
takes effect when you configure the Cyclone IV GX device. All unused transceiver
channels and blocks are powered down to reduce overall power consumption. The
gxb_powerdown
signal is an optional transceiver block signal. It powers down all
transceiver channels and all functional blocks in the transceiver block. The minimum
pulse width for this signal is 1 s. After power up, if you use the
gxb_powerdown
signal, wait for deassertion of the
busy
signal, then assert the
gxb_powerdown
signal for
a minimum of 1 s. Lastly, follow the sequence shown in Figure 2–13.