Altera Cyclone IV - LVPECL I;O Support in Cyclone IV Devices

6–34 Chapter 6: I/O Features in Cyclone IV Devices
High-Speed I/O Standards Support
Cyclone IV Device Handbook, March 2016 Altera Corporation
Volume 1
LVPECL I/O Support in Cyclone IV Devices
The LVPECL I/O standard is a differential interface standard that requires a 2.5-V
V
CCIO.
This standard is used in applications involving video graphics,
telecommunications, data communications, and clock distribution. Cyclone IV
devices support the LVPECL input standard at the dedicated clock input pins only.
The LVPECL receiver requires an external 100- termination resistor between the two
signals at the input buffer.
f For the LVPECL I/O standard electrical specification, refer to the Cyclone IV Device
Datasheet chapter.
AC coupling is required when the LVPECL common mode voltage of the output
buffer is higher than the Cyclone IV devices LVPECL input common mode voltage.
Figure 6–18 shows the AC-coupled termination scheme. The 50- resistors used at the
receiver are external to the device. DC-coupled LVPECL is supported if the LVPECL
output common mode voltage is in the Cyclone IV devices LVPECL input buffer
specification (refer to Figure 6–19).
Figure 6–19 shows the LVPECL DC-coupled termination.
Figure 6–18. LVPECL AC-Coupled Termination
(1)
Note to Figure 6–18:
(1) The LVPECL AC-coupled termination is applicable only when an Altera FPGA transmitter is used.
Figure 6–19. LVPECL DC-Coupled Termination
(1)
Note to Figure 6–19:
(1) The LVPECL DC-coupled termination is applicable only when an Altera FPGA transmitter is used.
Cyclone IV Device
LVPECL Receiver
50
Ω
50 Ω
V
ICM
Z
0
= 50 Ω
Z
0
= 50 Ω
LVPECL
Transmitter
0.1 µF
0.1 µF
Cyclone IV Device
LVPECL Receiver
100 Ω
50 Ω
50 Ω
LVPECL Transmitter