March 2016 Altera Corporation Cyclone IV Device Handbook,
Volume 1
Chapter Revision Dates
The chapters in this document, Cyclone IV Device Handbook,, were revised on the
following dates. Where chapters or groups of chapters are available separately, part
numbers are listed.
Chapter 1. Cyclone IV FPGA Device Family Overview
Revised: March 2016
Part Number: CYIV-51001-2.0
Chapter 2. Logic Elements and Logic Array Blocks in Cyclone IV Devices
Revised: November 2009
Part Number: CYIV-51002-1.0
Chapter 3. Memory Blocks in Cyclone IV Devices
Revised: November 2011
Part Number: CYIV-51003-1.1
Chapter 4. Embedded Multipliers in Cyclone IV Devices
Revised: February 2010
Part Number: CYIV-51004-1.1
Chapter 5. Clock Networks and PLLs in Cyclone IV Devices
Revised: October 2012
Part Number: CYIV-51005-2.4
Chapter 6. I/O Features in Cyclone IV Devices
Revised: March 2016
Part Number: CYIV-51006-2.7
Chapter 7. External Memory Interfaces in Cyclone IV Devices
Revised: March 2016
Part Number: CYIV-51007-2.6
Chapter 8. Configuration and Remote System Upgrades in Cyclone IV Devices
Revised: May 2013
Part Number: CYIV-51008-1.7
Chapter 9. SEU Mitigation in Cyclone IV Devices
Revised: May 2013
Part Number: CYIV-51009-1.3
Chapter 10. JTAG Boundary-Scan Testing for Cyclone IV Devices
Revised: December 2013
Part Number: CYIV-51010-1.3
Chapter 11. Power Requirements for Cyclone IV Devices
Revised: May 2013
Part Number: CYIV-51011-1.3
To Next Page
Loading...
