Altera Cyclone IV - Channel Interface Reconfiguration Mode

3–22 Chapter 3: Cyclone IV Dynamic Reconfiguration
Dynamic Reconfiguration Modes
Cyclone IV Device Handbook, November 2011 Altera Corporation
Volume 2
The following are the channel reconfiguration mode options:
■ Channel interface reconfiguration
■ Data rate division at receiver channel
Channel Interface Reconfiguration Mode
Enable this option if the reconfiguration of the transceiver channel involves the
following changes:
■ The reconfigured channel has a changed FPGA fabric-Transceiver channel
interface data width
■ The reconfigured channel has changed input control signals and output status
signals
■ The reconfigured channel has enabled and disabled the static PCS blocks of the
transceiver channel
The following are the new input signals available when you enable this option:
■ tx_datainfull —the width of this input signal depends on the number of channels
you set up in the ALTGX MegaWizard Plug-In Manager. It is 22 bits wide per
channel. This signal is available only for Transmitter only and Receiver and
Transmitter configurations. This port replaces the existing
tx_datain port.
■ rx_dataoutfull —the width of this output signal depends on the number of
channels you set up in the ALTGX MegaWizard Plug-In Manager. It is 32 bits wide
per channel. This signal is available only for Receiver only and Receiver and
Transmitter configurations. This port replaces the existing
rx_dataout port.
The Quartus II software has legality checks for the connectivity of
tx_datainfull
and
rx_dataoutfull and the various control and status signals you enable in the
Clocking/Interface screen. For example, the Quartus II software allows you to
select and connect the
pipestatus and powerdn signals. It assumes that you are
planning to switch to and from PCI Express (PIPE) functional mode.