Altera Cyclone IV - XGMII and PCS Code Conversions

1–70 Chapter 1: Cyclone IV Transceivers Architecture
Transceiver Functional Modes
Cyclone IV Device Handbook, February 2015 Altera Corporation
Volume 2
Figure 1–64 shows the transceiver configuration in XAUI mode.
XGMII and PCS Code Conversions
In XAUI mode, the 8B/10B encoder in the transmitter datapath maps various 8-bit
XGMII codes to 10-bit PCS code groups as listed in Table 1–21.
Figure 1–64. Transceiver Configuration in XAUI Mode
Functional Mode
Channel Bonding
Low-Latency PCS
Word Aligner (Pattern Length)
8B/10B Encoder/Decoder
Deskew FIFO
Rate Match FIFO
Byte SERDES
Byte Ordering
FPGA Fabric-to-Transceiver
Interface Width
FPGA Fabric-to-Transceiver
Interface Frequency (MHz)
3.125
Disabled
Automatic Synchronization
State Machine (7-bit, 10-Bit)
16-Bit
XAUI
×4
Disabled
Enabled
Enabled
Enabled
Enabled
Data Rate (Gbps)
156.25
Table 1–21. XGMII Character to PCS Code Groups Mapping (Part 1 of 2)
XGMII TXC
(1)
XGMII TXD
(2), (3)
PCS Code Group Description
0 00 through FF Dxx,y Normal data transmission
1 07 K28.0, K28.3, or K28.5 Idle in ||I||
1 07 K28.5 Idle in ||T||
1 9C K28.4 Sequence
1 FB K27.7 Start
1 FD K29.7 Terminate
1 FE K30.7 Error