3 Programming the Analyzer
STATus Subsystem
The data in this register is continuously updated and reflects the current conditions.
Mode All
Remote Command
:STATus:QUEStionable:INTegrity:CONDition?
Example STAT:QUES:INT:COND?
Preset 0
Status Bits/OPC
dependencies
Sequential command
Initial S/W Revision Prior to A.02.00
Questionable Integrity Enable
This command determines which bits in the Questionable Integrity Condition Register will set bits in the
Questionable Integrity Event register, which also sets the Integrity Summary bit (bit 9) in the Questionable
Register. The variable <integer> is the sum of the decimal values of the bits you want to enable.
Mode All
Remote Command
:STATus:QUEStionable:INTegrity:ENABle <integer>
:STATus:QUEStionable:INTegrity:ENABle?
Example STAT:QUES:INT:ENAB 8 Measurement Uncalibrated Summary will be reported to the Integrity
Summary of the Status Questionable register.
Preset 32767
Min 0
Max 32767
Status Bits/OPC
dependencies
Sequential command
Initial S/W Revision Prior to A.02.00
Questionable Integrity Event Query
This query returns the decimal value of the sum of the bits in the Questionable Integrity Event register.
The register requires that the associated PTR or NTR filters be set before a condition register bit can set a
bit in the event register. The data in this register is latched until it is queried. Once queried, the register is
cleared.
Mode All
Remote Command
:STATus:QUEStionable:INTegrity[:EVENt]?
Example STAT:QUES:INT?
Preset 0
Status Bits/OPC
dependencies
Sequential command
Initial S/W Revision Prior to A.02.00
128 EMI Receiver Mode Reference