3 Programming the Analyzer
STATus Subsystem
Questionable Integrity Negative Transition
This command determines which bits in the Questionable Integrity Condition register will set the
corresponding bit in the Questionable Integrity Event register when the condition register bit has a negative
transition (1 to 0)
The variable <integer> is the sum of the decimal values of the bits that you want to enable.
Mode All
Remote Command
:STATus:QUEStionable:INTegrity:NTRansition <integer>
:STATus:QUEStionable:INTegrity:NTRansition?
Example STAT:QUES:INT:NTR 8 Measurement ‘regained calibration’ Summary will be reported to the Integrity
Summary of the Status Questionable register.
Preset 0
Min 0
Max 32767
Status Bits/OPC
dependencies
Sequential command
Initial S/W Revision Prior to A.02.00
Questionable Integrity Positive Transition
This command determines which bits in the Questionable Integrity Condition register will set the
corresponding bit in the Questionable Integrity Event register when the condition register bit has a positive
transition (0 to 1). The variable <integer> is the sum of the decimal values of the bits that you want to
enable.
Mode All
Remote Command
:STATus:QUEStionable:INTegrity:PTRansition <integer>
:STATus:QUEStionable:INTegrity:PTRansition?
Example STAT:QUES:INT:PTR 8 Measurement ‘became uncalibrated’ Summary will be reported to the
Integrity Summary of the Status Questionable register.
Preset 32767
Min 0
Max 32767
Status Bits/OPC
dependencies
Sequential command
Initial S/W Revision Prior to A.02.00
Questionable Integrity Signal Register
"Questionable Integrity Signal Condition" on page 130
EMI Receiver Mode Reference 129