NXP Semiconductors MC9S12G - Page 1232

Detailed Register Address Map
MC9S12G Family Reference Manual Rev.1.27
1234 NXP Semiconductors
0x000A–0x000B Memory Map Control (MMC) Map 1 of 2
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0x000A Reserved
R00000000
W
0x000B MODE
R
MODC
0000000
W
0x000C–0x000D Port Integration Module (PIM) Map 2 of 6
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0x000C PUCR
R0
BKPUE
0
PDPEE PUPDE PUPCE PUPBE PUPAE
W
0x000D Reserved
R00000000
W
0x000E–0x000F Reserved
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0x000E-
0x000F
Reserved
R00000000
W
0x0010–0x0017 Memory Map Control (MMC) Map 2 of 2
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0x0010 Reserved
R00000000
W
0x0011 DIRECT
R
DP15 DP14 DP13 DP12 DP11 DP10 DP9 DP8
W
0x0012 Reserved
R00000000
W
0x0013 MMCCTL
R0000000
NVMRES
W
0x0014 Reserved
R00000000
W
0x0015 PPAGE
R0000
PIX3 PIX2 PIX1 PIX0
W
0x0016-
0x0017
Reserved
R00000000
W
0x0018–0x0019 Reserved
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0x0018-
0x0019
Reserved
R00000000
W