NXP Semiconductors MC9S12G - Page 221

Port Integration Module (S12GPIMV1)
MC9S12G Family Reference Manual Rev.1.27
NXP Semiconductors 223
2.4.3.38 Port P Polarity Select Register (PPSP)
Table 2-64. PERP Register Field Descriptions
Field Description
7-0
PERP
Port P pull device enable—Enable pull device on input pin
This bit controls whether a pull device on the associated port input pin is active. If a pin is used as output this bit has
no effect. The polarity is selected by the related polarity select register bit.
1 Pull device enabled
0 Pull device disabled
Address 0x025D (G1, G2) Access: User read/write
1
1
Read: Anytime
Write: Anytime
76543210
R
PPSP7 PPSP6 PPSP5 PPSP4 PPSP3 PPSP2 PPSP1 PPSP0
W
Reset00000000
Address 0x025D (G3) Access: User read/write
1
76543210
R0 0
PPSP5 PPSP4 PPSP3 PPSP2 PPSP1 PPSP0
W
Reset00000000
Figure 2-39. Port P Polarity Select Register (PPSP)
Table 2-65. PPSP Register Field Descriptions
Field Description
7-0
PPSP
Port P pull device select—Configure pull device and pin interrupt edge polarity on input pin
This bit selects a pullup or a pulldown device if enabled on the associated port input pin.
This bit also selects the polarity of the active pin interrupt edge.
1 Pulldown device selected; rising edge selected
0 Pullup device selected; falling edge selected