NXP Semiconductors MC9S12G User Manual

Port Integration Module (S12GPIMV1)
MC9S12G Family Reference Manual Rev.1.27
NXP Semiconductors 237
2.4.3.60 Port AD Polarity Select Register (PPS1AD)
Table 2-85. PPS0AD Register Field Descriptions
Field Description
7-0
PPS0AD
Port AD pull device select—Configure pull device and pin interrupt edge polarity on input pin
This bit selects a pullup or a pulldown device if enabled on the associated port input pin.
This bit also selects the polarity of the active pin interrupt edge.
1 Pulldown device selected; rising edge selected
0 Pullup device selected; falling edge selected
Address 0x027B Access: User read/write
1
1
Read: Anytime
Write: Anytime
76543210
R
PPS1AD7 PPS1AD6 PPS1AD5 PPS1AD4 PPS1AD3 PPS1AD2 PPS1AD1 PPS1AD0
W
Reset00000000
Figure 2-59. Port AD Polarity Select Register (PPS1AD)
Table 2-86. PPS1AD Register Field Descriptions
Field Description
7-0
PPS1AD
Port AD pull device select—Configure pull device and pin interrupt edge polarity on input pin
This bit selects a pullup or a pulldown device if enabled on the associated port input pin.
This bit also selects the polarity of the active pin interrupt edge.
1 Pulldown device selected; rising edge selected
0 Pullup device selected; falling edge selected

NXP Semiconductors MC9S12G Specifications

General

Architecture	16-bit
Operating Temperature Range	-40°C to +125°C
Flash Memory	128 KB
RAM	8 KB
EEPROM	2 KB
ADC	10-bit
Communication Interfaces	SCI, SPI, I2C
Package	LQFP