Port Integration Module (S12GPIMV1)
MC9S12G Family Reference Manual Rev.1.27
240 NXP Semiconductors
2.4.3.64 Port AD Interrupt Flag Register (PIF1AD)
Address 0x027F Access: User read/write
1
1
Read: Anytime
Write: Anytime
76543210
R
PIF1AD7 PIF1AD6 PIF1AD5 PIF1AD4 PIF1AD3 PIF1AD2 PIF1AD1 PIF1AD0
W
Reset00000000
Figure 2-63. Port AD Interrupt Flag Register (PIF1AD)
Table 2-90. PIF1AD Register Field Descriptions
Field Description
7-0
PIF1AD
Port AD interrupt flag—
This flag asserts after a valid active edge was detected on the related pin (see Section 2.5.4.2, “Pin Interrupts and
Wakeup”). This can be a rising or a falling edge based on the state of the polarity select register. An interrupt will
occur if the associated interrupt enable bit is set.
Writing a logic “1” to the corresponding bit field clears the flag.
1 Active edge on the associated bit has occurred
0 No active edge occurred
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