NXP Semiconductors MC9S12G - Page 319

S12S Debug Module (S12SDBGV2)
MC9S12G Family Reference Manual Rev.1.27
NXP Semiconductors 321
8.3.2.8.2 Debug Comparator Address High Register (DBGXAH)
The DBGC1_COMRV bits determine which comparator address registers are visible in the 8-byte window
from 0x0028 to 0x002F as shown in Section Table 8-24., “Comparator Address Register Visibility
Table 8-24. Comparator Address Register Visibility
Read: Anytime. See Table 8-24 for visible register encoding.
Write: If DBG not armed. See Table 8-24 for visible register encoding.
Table 8-23. Read or Write Comparison Logic Table
RWE Bit RW Bit RW Signal Comment
0 x 0 RW not used in comparison
0 x 1 RW not used in comparison
1 0 0 Write data bus
10 1 No match
11 0 No match
1 1 1 Read data bus
Address: 0x0029
76543210
R000000
Bit 17 Bit 16
W
Reset00000000
= Unimplemented or Reserved
Figure 8-16. Debug Comparator Address High Register (DBGXAH)
COMRV Visible Comparator
00 DBGAAH, DBGAAM, DBGAAL
01 DBGBAH, DBGBAM, DBGBAL
10 DBGCAH, DBGCAM, DBGCAL
11 None
Table 8-25. DBGXAH Field Descriptions
Field Description
1–0
Bit[17:16]
Comparator Address High Compare Bits — The Comparator address high compare bits control whether the
selected comparator compares the address bus bits [17:16] to a logic one or logic zero.
0 Compare corresponding address bit to a logic zero
1 Compare corresponding address bit to a logic one