NXP Semiconductors MC9S12G - Page 374

S12 Clock, Reset and Power Management Unit (S12CPMU)
MC9S12G Family Reference Manual Rev.1.27
376 NXP Semiconductors
10.3.2.10 Reserved Register CPMUTEST0
NOTE
This reserved register is designed for factory test purposes only, and is not
intended for general user access. Writing to this register when in Special
Mode can alter the S12CPMU’s functionality.
Read: Anytime
Write: Only in Special Mode
10.3.2.11 Reserved Register CPMUTEST1
NOTE
This reserved register is designed for factory test purposes only, and is not
intended for general user access. Writing to this register when in Special
Mode can alter the S12CPMU’s functionality.
Table 10-14. COP Watchdog Rates if COPOSCSEL1=1
CR2 CR1 CR0
COPCLK
Cycles to Time-out
(COPCLK is ACLK -
internal RC-Oscillator clock)
0 0 0 COP disabled
001 2
7
010 2
9
011 2
11
100 2
13
101 2
15
110 2
16
111 2
17
0x003D
76543210
R00000000
W
Reset00000000
= Unimplemented or Reserved
Figure 10-13. Reserved Register (CPMUTEST0)