NXP Semiconductors MC9S12G - Page 432

Analog-to-Digital Converter (ADC12B8CV2)
MC9S12G Family Reference Manual Rev.1.27
434 NXP Semiconductors
0x0003 ATDCTL3
R
DJM S8C S4C S2C S1C FIFO FRZ1 FRZ0
W
0x0004 ATDCTL4
R
SMP2 SMP1 SMP0 PRS[4:0]
W
0x0005 ATDCTL5
R0
SC SCAN MULT CD CC CB CA
W
0x0006 ATDSTAT0
R
SCF
0
ETORF FIFOR
CC3 CC2 CC1 CC0
W
0x0007
Unimple-
mented
R0 000 0 0 0 0
W
0x0008 ATDCMPEH
R0 000 0 0 0 0
W
0x0009 ATDCMPEL
R
CMPE[7:0]
W
0x000A ATDSTAT2H
R0 000 0 0 0 0
W
0x000B ATDSTAT2L
R CCF[7:0]
W
0x000C ATDDIENH
R1 111 1 1 1 1
W
0x000D ATDDIENL
R
IEN[7:0]
W
0x000E ATDCMPHTH
R0 000 0 0 0 0
W
0x000F ATDCMPHTL
R
CMPHT[7:0]
W
0x0010 ATDDR0
R
See Section 12.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 12.3.2.12.2, “Right Justified Result Data (DJM=1)”
W
0x0012 ATDDR1
R
See Section 12.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 12.3.2.12.2, “Right Justified Result Data (DJM=1)”
W
0x0014 ATDDR2
R
See Section 12.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 12.3.2.12.2, “Right Justified Result Data (DJM=1)”
W
0x0016 ATDDR3
R
See Section 12.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 12.3.2.12.2, “Right Justified Result Data (DJM=1)”
W
0x0018 ATDDR4
R
See Section 12.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 12.3.2.12.2, “Right Justified Result Data (DJM=1)”
W
0x001A ATDDR5
R
See Section 12.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 12.3.2.12.2, “Right Justified Result Data (DJM=1)”
W
0x001C ATDDR6
R
See Section 12.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 12.3.2.12.2, “Right Justified Result Data (DJM=1)”
W
0x001E ATDDR7
R
See Section 12.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 12.3.2.12.2, “Right Justified Result Data (DJM=1)”
W
0x0020 -
0x002F
Unimple-
mented
R
0 000 0 0 0 0
W
Address Name Bit 7 6 5 4 3 2 1 Bit 0
= Unimplemented or Reserved
Figure 12-2. ADC12B8C Register Summary (Sheet 2 of 2)