NXP Semiconductors MC9S12G User Manual

Scalable Controller Area Network (S12MSCANV3)
MC9S12G Family Reference Manual Rev.1.27
588 NXP Semiconductors
The IDHITx indicators are always related to the message in the foreground buffer (RxFG). When a
message gets shifted into the foreground buffer of the receiver FIFO the indicators are updated as well.
Module Base + 0x000B Access: User read/write
1
1
Read: Anytime
Write: Anytime in initialization mode (INITRQ = 1 and INITAK = 1), except bits IDHITx, which are read-only
76543210
R0 0
IDAM1 IDAM0
0 IDHIT2 IDHIT1 IDHIT0
W
Reset:00000000
= Unimplemented
Figure 18-15. MSCAN Identifier Acceptance Control Register (CANIDAC)
Table 18-18. CANIDAC Register Field Descriptions
Field Description
5-4
IDAM[1:0]
Identifier Acceptance Mode — The CPU sets these flags to define the identifier acceptance filter organization
(see Section 18.4.3, “Identifier Acceptance Filter”). Table 18-19 summarizes the different settings. In filter closed
mode, no message is accepted such that the foreground buffer is never reloaded.
2-0
IDHIT[2:0]
Identifier Acceptance Hit Indicator — The MSCAN sets these flags to indicate an identifier acceptance hit (see
Section 18.4.3, “Identifier Acceptance Filter”). Table 18-20 summarizes the different settings.
Table 18-19. Identifier Acceptance Mode Settings
IDAM1 IDAM0 Identifier Acceptance Mode
0 0 Two 32-bit acceptance filters
0 1 Four 16-bit acceptance filters
1 0 Eight 8-bit acceptance filters
1 1 Filter closed
Table 18-20. Identifier Acceptance Hit Indication
IDHIT2 IDHIT1 IDHIT0 Identifier Acceptance Hit
0 0 0 Filter 0 hit
0 0 1 Filter 1 hit
0 1 0 Filter 2 hit
0 1 1 Filter 3 hit
1 0 0 Filter 4 hit
1 0 1 Filter 5 hit
1 1 0 Filter 6 hit
1 1 1 Filter 7 hit

NXP Semiconductors MC9S12G Specifications

General

Brand	NXP Semiconductors
Model	MC9S12G
Category	Microcontrollers
Language	English