RL78/G15 CHAPTER 4 PORT FUNCTIONS
R01UH0959EJ0110 Rev.1.10 Page 125 of 765
Mar 7, 2023
Table 4-7. Setting Examples of Registers and Output Latches When Using Pin Function (8/10)
Pin
Name
Used Function PIORr POMp PMCq PMn Pm Alternate Function Output 20-
pin
16-
pin
10-
pin
8-
pin
Function
Name
I/O SAU Output Function Other than SAU
P40 P40 Input — — — 1 × — ×
Output — — — 0 0/1 — (PCLBUZ0) = 0
Note 5
(TO01) = 0
PCLBUZ0 = 0
Note 4
VCOUT = 0
Note 4
(PCLBUZ0) Output PIOR31 = 0
Note 1
PIOR30 = 1
— — 0 0 — (TO01) = 0 —
(TI01) Input PIOR03 = 0
Note 5
PIOR02 = 1
— — 1 × — ×
(TO01) Output PIOR03 = 0
Note 5
PIOR02 = 1
— — 0 0 — (PCLBUZ0) = 0
Note 5
PCLBUZ0 = 0
Note 4
VCOUT = 0
Note 4
INTP2 Input PIOR21 = 0
Note 1
× — 1 × — ×
PCLBUZ0 Output — — — 0 0 — (TO01) = 0
VCOUT = 0
— — —
VCOUT0 Output PIOR32 = 0 — — 0 0 — (TO01) = 0
PCLBUZ0 = 0
— — —
P41 P41 Input — × — 1 × × × — —
Output — 0 — 0 0/1 (SDA01/SO01) = 1
Note 2
TO03 = 0
(TO02) = 0
VCOUT1 = 0
Note 2
N-ch open
drain output
— 1 — 0 0/1
TI03 Input PIOR07 = 0
Note 2
× — 1 × × × — —
TO03 Output PIOR07 = 0
Note 2
PIOR06 = 0
0 — 0 0 × (TO02) = 0
VCOUT1 = 0
Note 2
— —
(INTP4) Input PIOR23 = 1 × — 1 × × × — —
(TI02) Input PIOR05 = 1
PIOR04 = 0
× — 1 × × × — —
(TO02) Output PIOR05 = 1
PIOR04 = 0
0 — 0 0 × TO03 = 0
VCOUT1 = 0
Note 2
— —
VCOUT1 Output PIOR33 = 0 0 — 0 0 × TO03 = 0
(TO02) = 0
— — —
(SDA01) I/O PIOR13 = 1
PIOR12 = 0
1 — 0 1 × TO03 = 0
(TO02) = 0
VCOUT1 = 0
— — —
(SO01) Output PIOR13 = 1
PIOR12 = 0
0 — 0 1 × TO03 = 0
(TO02) = 0
VCOUT1 = 0
— — —
Note 1. 16-pin and 20-pin products only
Note 2. 20-pin products only
Note 3. 8-pin and 10-pin products only
Note 4. 8-pin products only
Note 5. 10- to 20-pin products only