Renesas RL78/G15

RL78/G15 CHAPTER 12 SERIAL ARRAY UNIT
R01UH0959EJ0110 Rev.1.10 Page 416 of 765
Mar 7, 2023
Figure 12-36. Flowchart of Master Reception (in Continuous Reception Mode)
Starting simplified SPI (CSI)
communication
End of communication
Disable interrupt (MASK)
Setting storage area of the receive data, number of communication data
(Storage area , Reception data pointer, and number of communication
data are optionally set on the internal RAM by the software)
Clear interrupt request flag (xxIF), reset interrupt mask (xxMK), and
set interrupt enable (EI)
Wait for receive completes
Subtract –1 from number of
communication data
Reading receive data from SIOp
(= SDRmn [7:0])
Number of
communication data
= 0?
RETI
Number of
communication
data?
≥ 2
Buffer empty/transfer end interrupt
SAU initial setting
No
Read receive data, if any, then write them to storage area,
and update receive data pointer (also subtract –1 from
number of communication data)
When number of communication data
becomes 0, receive completes
Set STmn bit to 1
Communication continued?
Set MDmn0 bit to 1
Yes
Yes
No
Clear MDmn0 bit to 0
Main routine Interrupt processing routine Main routine
<1>
<3> <6>
<8>
Writing dummy data to SIOp
(= SDRmn [7:0])
BFFmn = 1?
Yes
<2>
<5>
= 1
= 0
<4>
<7>
No
Writing dummy data to SIOp
(= SDRmn [7:0])
Enables interrupt
Setting receive data
Writing to SIOp makes SCKp signals
out (communication starts)
When interrupt is generated, it moves to
interrupt processing routine.
<2>
(Remark is listed on the next page.)
For the initial setting, refer to Figure 12-30.
(Select buffer empty interrupt)