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Renesas RL78/G15 User Manual

Renesas RL78/G15
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RL78/G15 CHAPTER 12 SERIAL ARRAY UNIT
R01UH0959EJ0110 Rev.1.10 Page 481 of 765
Mar 7, 2023
(3) Permissible baud rate range for reception
The permissible baud rate range for reception during UART (UART0) communication can be calculated by the following
expression. Make sure that the baud rate at the transmission side is within the permissible baud rate range at the
reception side.
(Maximum receivable baud rate) =
2 × k × Nfr
2 × k × Nfr k + 2
× Brate
(Minimum receivable baud rate) =
2 × k ×
(
Nfr 1
)
2 × k × Nfr k 2
× Brate
Brate: Calculated baud rate value at the reception side (See 12.6.3(1) Baud rate calculation expression.)
k: SDRmn[15:9] + 1
Nfr: 1 data frame length [bits] = (Start bit) + (Data length) + (Parity bit) + (Stop bit)
Remark m: Unit number (m = 0), n: Channel number (n = 1), mn = 01
Figure 12-82. Permissible Baud Rate Range for Reception (1 Data Frame Length = 11 Bits)
FL
1 data frame
(11
× FL)
(
11 × FL) min.
(11 × FL)
max.
Data frame length
of SAU
Start bit Bit 0 Bit 1
Bit 7
Parity bit
Permissible minimum
data frame length
Permissible maximum
data frame length
Latch timing
Stop bit
Start bit Bit 0 Bit
1 Bit 7
Parity bit
Start bit Bit
0 Bit 1 Bit 7 Parity bit Stop bit
Stop bit
As shown in Figure 12-82, the timing of latching receive data is determined by the division ratio set by bits 15 to 9 of
serial data register mn (SDRmn) after the start bit is detected. If the last data (stop bit) is received before this latch
timing, the data can be correctly received.

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Renesas RL78/G15 Specifications

General IconGeneral
BrandRenesas
ModelRL78/G15
CategoryMicrocontrollers
LanguageEnglish

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