Altera Cyclone IV - Page 407

Chapter 3: Cyclone IV Dynamic Reconfiguration 3–9
Dynamic Reconfiguration Controller Port List
November 2011 Altera Corporation Cyclone IV Device Handbook,
Volume 2
rx_eqdcgain
[1..0]
(1)
Input
This is an optional equalizer DC gain write control.
The width of this signal is fixed to 2 bits if you enable either the Use
'logical_channel_address' port for Analog controls reconfiguration option or the Use
same control signal for all the channels option in the Analog controls screen. Otherwise,
the width of this signal is 2 bits per channel.
The following values are the legal settings allowed for this signal:
rx_eqdcgain[1..0] Corresponding ALTGX Corresponding
settings DC Gain value
(dB)
2’b00 0 0
2’b01 1 3
(2)
2’b10 2 6
All other values => N/A
For more information, refer to the “Programmable Equalization and DC Gain” section of the
Cyclone IV GX Device Datasheet chapter.
tx_vodctrl_out
[2..0]
Output
This is an optional transmit V
OD
read control signal. This signal reads out the value written
into the V
OD
control register. The width of this output signal depends on the number of
channels controlled by the dynamic reconfiguration controller and also the configuration of
the Use 'logical_channel_address' port for Analog controls reconfiguration option and
the Use same control signal for all the channels option.
tx_preemp_out
[4..0]
Output
This is an optional pre-emphasis read control signal. This signal reads out the value written
by its input control signal. The width of this output signal depends on the number of
channels controlled by the dynamic reconfiguration controller and also the configuration of
the Use 'logical_channel_address' port for Analog controls reconfiguration option and
the Use same control signal for all the channels option.
rx_eqctrl_out
[3..0]
Output
This is an optional read control signal to read the setting of equalization setting of the
ALTGX instance. The width of this output signal depends on the number of channels
controlled by the dynamic reconfiguration controller and also the configuration of the Use
'logical_channel_address' port for Analog controls reconfiguration option and the Use
same control signal for all the channels option.
rx_eqdcgain_out
[1..0]
Output
This is an optional equalizer DC gain read control signal. This signal reads out the settings
of the ALTGX instance DC gain. The width of this output signal depends on the number of
channels controlled by the dynamic reconfiguration controller and also the configuration of
the Use 'logical_channel_address' port for Analog controls reconfiguration option and
the Use same control signal for all the channels option.
Transceiver Channel Reconfiguration Control/Status Signals
reconfig_mode_
sel[2..0]
(3)
Input
Set the following values at this signal to activate the appropriate dynamic reconfiguration
mode:
3’b000 = PMA controls reconfiguration mode. This is the default value.
3’b001 = Channel reconfiguration mode
All other values => N/A
reconfig_mode_sel[] is available as an input only when you enable more than one
dynamic reconfiguration mode.
Table 3–2. Dynamic Reconfiguration Controller Port List (ALTGX_RECONFIG Instance) (Part 6 of 7)
Port Name
Input/
Output
Description