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Altera Cyclone IV - Page 465

Altera Cyclone IV
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Chapter 1: Cyclone IV Device Datasheet 1–19
Switching Characteristics
December 2016 Altera Corporation Cyclone IV Device Handbook,
Volume 3
Signal detect/loss
threshold
PIPE mode 65 175 65 175 65 175 mV
t
LTR
(10)
—— 75 —— 75—— 75 µs
t
LTR-LTD_Manual
(11)
15— 15— —15— µs
t
LTD
(12)
0 100 4000 0 100 4000 0 100 4000 ns
t
LTD_Manual
(13)
4000 4000 4000 ns
t
LTD_Auto
(14)
4000 4000 4000 ns
Receiver buffer and
CDR offset
cancellation time
(per channel)
17000 17000 17000
recon
fig_c
lk
cycles
Programmable DC
gain
DC Gain Setting =
0
—0 —0 —0 dB
DC Gain Setting =
1
—3 —3 —3 dB
DC Gain Setting =
2
—6 —6 —6 dB
Transmitter
Supported I/O
Standards
1.5 V PCML
Data rate (F324 and
smaller package)
600 2500 600 2500 600 2500 Mbps
Data rate (F484 and
larger package)
600 3125 600 3125 600 2500 Mbps
V
OCM
0.65 V setting 650 650 650 mV
Differential on-chip
termination resistors
100 setting 100 100 100
150 setting 150 150 150
Differential and
common mode
return loss
PIPE, CPRI LV,
Serial Rapid I/O
SR, SDI, XAUI,
SATA
Compliant
Rise time 50 200 50 200 50 200 ps
Fall time 50 200 50 200 50 200 ps
Intra-differential pair
skew
15 15 15 ps
Intra-transceiver
block skew
120 120 120 ps
Table 1–21. Transceiver Specification for Cyclone IV GX Devices (Part 3 of 4)
Symbol/
Description
Conditions
C6 C7, I7 C8
Unit
Min Typ Max Min Typ Max Min Typ Max

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