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NXP Semiconductors MC9S12G - Page 215

NXP Semiconductors MC9S12G
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Port Integration Module (S12GPIMV1)
MC9S12G Family Reference Manual Rev.1.27
NXP Semiconductors 217
2.4.3.30 Port M Pull Device Enable Register (PERM)
Table 2-54. DDRM Register Field Descriptions
Field Description
3-0
DDRM
Port M data direction
This bit determines whether the associated pin is a general-purpose input or output.
1 Associated pin configured as output
0 Associated pin configured as input
Address 0x0254 (G1, G2) Access: User read/write
1
1
Read: Anytime
Write: Anytime
76543210
R0000
PERM3 PERM2 PERM1 PERM0
W
Reset00000000
Address 0x0254 (G3) Access: User read/write
1
76543210
R000000
PERM1 PERM0
W
Reset00000000
Figure 2-31. Port M Pull Device Enable Register (PERM)
Table 2-55. PERM Register Field Descriptions
Field Description
3-1
PERM
Port M pull device enable—Enable pull device on input pin or wired-or output pin
This bit controls whether a pull device on the associated port input pin is active. The polarity is selected by the related
polarity select register bit. If a pin is used as output this bit has only effect if used in wired-or mode with a pullup
device.
1 Pull device enabled
0 Pull device disabled
0
PERM
Port M pull device enable—Enable pull device on input pin or wired-or output pin
This bit controls whether a pull device on the associated port input pin is active. The polarity is selected by the related
polarity select register bit. If a pin is used as output this bit has only effect if used in wired-or mode with a pullup
device.
If CAN is active the selection of a pulldown device on the RXCAN input will have no effect.
1 Pull device enabled
0 Pull device disabled

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