Port Integration Module (S12GPIMV1)
MC9S12G Family Reference Manual Rev.1.27
226 NXP Semiconductors
2.4.3.41 Reserved Registers
NOTE
Addresses 0x0260-0x0261 are reserved for ACMP registers in G2 and G3
only. Refer to ACMP section “ACMP Control Register (ACMPC)” and
“ACMP Status Register (ACMPS)”.
2.4.3.42 Port J Data Register (PTJ)
Address 0x0268 (G1, G2) Access: User read/write
1
1
Read: Anytime. The data source is depending on the data direction value.
Write: Anytime
76543210
R
PTJ7 PTJ6 PTJ5 PTJ4 PTJ3 PTJ2 PTJ1 PTJ0
W
Reset00000000
Address 0x0268 (G3) Access: User read/write
1
76543210
R0000
PTJ3 PTJ2 PTJ1 PTJ0
W
Reset00000000
Figure 2-42. Port J Data Register (PTJ)
Table 2-68. PTJ Register Field Descriptions
Field Description
7-0
PTJ
Port J general-purpose input/output data—Data Register
When not used with an alternative signal, the associated pin can be used as general-purpose I/O. In general-purpose
output mode the port data register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port data register bit, otherwise the
buffered pin input state is read.
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