NXP Semiconductors MC9S12G - Page 696

Serial Peripheral Interface (S12SPIV5)
MC9S12G Family Reference Manual Rev.1.27
698 NXP Semiconductors
21.3.2.3 SPI Baud Rate Register (SPIBR)
Read: Anytime
Write: Anytime; writes to the reserved bits have no effect
The baud rate divisor equation is as follows:
BaudRateDivisor = (SPPR + 1)  2
(SPR + 1)
Eqn. 21-1
The baud rate can be calculated with the following equation:
Baud Rate = BusClock / BaudRateDivisor Eqn. 21-2
NOTE
For maximum allowed baud rates, please refer to the SPI Electrical
Specification in the Electricals chapter of this data sheet.
Module Base +0x0002
76543210
R0
SPPR2 SPPR1 SPPR0
0
SPR2 SPR1 SPR0
W
Reset00000000
= Unimplemented or Reserved
Figure 21-5. SPI Baud Rate Register (SPIBR)
Table 21-5. SPIBR Field Descriptions
Field Description
6–4
SPPR[2:0]
SPI Baud Rate Preselection Bits — These bits specify the SPI baud rates as shown in Table 21-6. In master
mode, a change of these bits will abort a transmission in progress and force the SPI system into idle state.
2–0
SPR[2:0]
SPI Baud Rate Selection Bits — These bits specify the SPI baud rates as shown in Table 21-6. In master mode,
a change of these bits will abort a transmission in progress and force the SPI system into idle state.
Table 21-6. Example SPI Baud Rate Selection (25 MHz Bus Clock)
SPPR2 SPPR1 SPPR0 SPR2 SPR1 SPR0
Baud Rate
Divisor
Baud Rate
000000 2 12.5 Mbit/s
000001 4 6.25 Mbit/s
0 0 0 0 1 0 8 3.125 Mbit/s
0 0 0 0 1 1 16 1.5625 Mbit/s
0 0 0 1 0 0 32 781.25 kbit/s
0 0 0 1 0 1 64 390.63 kbit/s
0 0 0 1 1 0 128 195.31 kbit/s
0 0 0 1 1 1 256 97.66 kbit/s
001000 4 6.25 Mbit/s
0 0 1 0 0 1 8 3.125 Mbit/s