NXP Semiconductors MC9S12G - Page 722

Timer Module (TIM16B6CV3)
MC9S12G Family Reference Manual Rev.1.27
724 NXP Semiconductors
22.3.2.3 Timer Count Register (TCNT)
The 16-bit main timer is an up counter.
A full access for the counter register should take place in one clock cycle. A separate read/write for high
byte and low byte will give a different result than accessing them as a word.
Read: Anytime
Write: Has no meaning or effect in the normal mode; only writable in special modes (test_mode = 1).
The period of the first count after a write to the TCNT registers may be a different size because the write
is not synchronized with the prescaler clock.
22.3.2.4 Timer System Control Register 1 (TSCR1)
Read: Anytime
Write: Anytime
Module Base + 0x0004
15 14 13 12 11 10 9 9
R
TCNT15 TCNT14 TCNT13 TCNT12 TCNT11 TCNT10 TCNT9 TCNT8
W
Reset00000000
Figure 22-6. Timer Count Register High (TCNTH)
Module Base + 0x0005
76543210
R
TCNT7 TCNT6 TCNT5 TCNT4 TCNT3 TCNT2 TCNT1 TCNT0
W
Reset00000000
Figure 22-7. Timer Count Register Low (TCNTL)
Module Base + 0x0006
76543210
R
TEN TSWAI TSFRZ TFFCA PRNT
000
W
Reset00000000
= Unimplemented or Reserved
Figure 22-8. Timer System Control Register 1 (TSCR1)