RL78/G15 CHAPTER 6 TIMER ARRAY UNIT
R01UH0959EJ0110 Rev.1.10 Page 200 of 765
Mar 7, 2023
Figure 6-21. Format of Noise Filter Enable Registers 1 (NFEN1) (2/2)
Address: F0071H After reset: 00H R/W
Symbol 7 6 5 4 3 2 1 0
NFEN1 TNFEN07 TNFEN06 TNFEN05 TNFEN04 TNFEN03 TNFEN02 TNFEN01 TNFEN00
TNFEN02 Enable/disable using noise filter of TI02 pin
0 Noise filter OFF
1 Noise filter ON
TNFEN01 Enable/disable using noise filter of TI01 pin
Note 1
0 Noise filter OFF
1 Noise filter ON
TNFEN00 Enable/disable using noise filter of TI00 pin
0 Noise filter OFF
1 Noise filter ON
Note 1. The applicable pin can be switched by setting the ISC1 bit of the ISC register.
ISC1 = 0: Whether or not to use the noise filter of the TI01 pin can be selected.
ISC1 = 1: Whether or not to use the noise filter of the RxD0 pin can be selected.
Remark The presence or absence of timer I/O pins of channel 0 to 7 depends on the product. See Table 6-2 Timer
I/O Pins provided in Each Product.
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