RL78/G15 CHAPTER 6 TIMER ARRAY UNIT
R01UH0959EJ0110 Rev.1.10 Page 296 of 765
Mar 7, 2023
Figure 6-82. Example of Set Contents of Registers for Two-channel Input with One-shot Pulse Output Function
(Slave Channel) (2/2)
(b) Timer output register 0 (TO0)
Bit p
TO0 TO0p 0: Outputs 0 from TO0p.
1: Outputs 1 from TO0p.
1/0
(c) Timer output enable register 0 (TOE0)
Bit p
TOE0 TOE0p
0: Stops the TO0p output operation by counting operation (the level set in the TO0p bit is output from the
TO0p pin).
1: Enables the TO0p output operation by counting operation (output from the TO0p pin is toggled).
1/0
(d) Timer output level register 0 (TOL0)
Bit p
TOL0 TOL0p
0: Positive logic output (active-high)
1: Negative logic output (active-low)
1/0
(e) Timer output mode register 0 (TOM0)
Bit p
TOM0
1: Sets the slave channel output mode.
1
Remark p: Slave channel number (p = 3)
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