Altera Cyclone IV - Page 193

Chapter 8: Configuration and Remote System Upgrades in Cyclone IV Devices 8–29
Configuration
May 2013 Altera Corporation Cyclone IV Device Handbook,
Volume 1
Figure 8–10 shows the AP configuration with multiple bus masters.
Figure 8–10. AP Configuration with Multiple Bus Masters
Notes to Figure 8–10:
(1) Connect the pull-up resistors to the V
CCIO
supply of the bank in which the pin resides.
(2) The
nCEO pin is left unconnected or used as a user I/O pin when it does not feed the nCE pin of another device.
(3) The
MSEL pin settings vary for different configuration voltage standards and POR time. To connect MSEL[3..0] , refer to Table 8–5 on page 8–9.
Connect the
MSEL pins directly to V
CCA
or GND.
(4) The AP configuration ignores the
WAIT signal during configuration mode. However, if you are accessing flash during user mode with user logic,
you can optionally use the normal I/O to monitor the
WAIT signal from the Micron P30 or P33 flash.
(5) When cascading Cyclone IV E devices in a multi-device AP configuration, connect the repeater buffers between the master device and slave
devices for
DATA[15..0] and DCLK . All I/O inputs must maintain a maximum AC voltage of 4.1 V. The output resistance of the repeater buffers
must fit the maximum overshoot equation outlined in “Configuration and JTAG Pin I/O Requirements” on page 8–5.
(6) The other master device must fit the maximum overshoot equation outlined in “Configuration and JTAG Pin I/O Requirements” on page 8–5.
(7) The other master device can control the AP configuration bus by driving the nCE to high with an output high on the I/O pin.
(8) The other master device can pulse
nCONFIG if it is under system control and not tied to V
CCIO
.
CLK RST# CE# OE# ADV# WE# WAIT DQ[15:0] A[24:1] I/O
(7)
nCONFIG
(8)
CLK
RST#
CE#
OE#
ADV#
WE#
WAIT
DQ[15:0]
A[24:1]
DCLK
(5)
nRESET
FLASH_nCE
nOE
nAVD
nWE
I/O
(4)
DATA[15..0] (5)
PADD[23..0]
nCE
V
CCIO
(1)
V
CCIO
(1)
10 k
10 k
nCONFIG
nSTATUS
CONF_DONE
MSEL[3..0]
(3
)
nCEO
Cyclone IV E
Master DeviceMicron P30/P33 Flash
GND
10 k
(2
)
Other Master Device
(6)
V
CCIO
(1)
10 k