Altera Cyclone IV - Page 292

1–12 Chapter 1: Cyclone IV Transceivers Architecture
Receiver Channel Datapath
Cyclone IV Device Handbook, February 2015 Altera Corporation
Volume 2
The high-speed serial link can be AC- or DC-coupled, depending on the serial
protocol implementation. In an AC-coupled link, the AC-coupling capacitor blocks
the transmitter DC common mode voltage as shown in Figure 1–12. Receiver OCT
and on-chip biasing circuitry automatically restores the common mode voltage. The
biasing circuitry is also enabled by enabling OCT. If you disable the OCT, then you
must externally terminate and bias the receiver. AC-coupled links are required for
PCIe, GbE, Serial RapidIO, SDI, XAUI, SATA, V-by-One and Display Port protocols.
Figure 1–12. AC-Coupled Link with OCT
Physical Medium
Transmitter
Receiver
TX
V
CM
RX
V
CM
TX Termination
RX Termination
AC Coupling
Capacitor
AC Coupling
Capacitor
Physical Medium