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Altera Cyclone IV - Page 422

Altera Cyclone IV
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3–24 Chapter 3: Cyclone IV Dynamic Reconfiguration
Dynamic Reconfiguration Modes
Cyclone IV Device Handbook, November 2011 Altera Corporation
Volume 2
Table 35 describes the
rx_dataoutfull[31..0]
FPGA fabric-Transceiver channel
interface signals.
Table 3–5. rx_dataoutfull[31..0] FPGA Fabric-Transceiver Channel Interface Signal Descriptions (Part 1 of 3)
FPGA Fabric-Transceiver Channel
Interface Description
Receive Signal Description (Based on Cyclone IV GX Supported FPGA
Fabric-Transceiver Channel Interface Widths)
8-bit FPGA fabric-Transceiver
Channel Interface
The following signals are used in 8-bit 8B/10B modes:
rx_dataoutfull[7:0]
: 8-bit decoded data (
rx_dataout
)
rx_dataoutfull[8]
: Control bit (
rx_ctrldetect
)
rx_dataoutfull[9]
: Code violation status signal (
rx_errdetect
)
rx_dataoutfull
[10]:
rx_syncstatus
rx_dataoutfull[11]
: Disparity error status signal (
rx_disperr
)
rx_dataoutfull[12]
: Pattern detect status signal (
rx_patterndetect
)
rx_dataoutfull[13]
: Rate Match FIFO deletion status indicator
(
rx_rmfifodatadeleted
) in non-PCI Express (PIPE) functional modes.
rx_dataoutfull[14]
: Rate Match FIFO insertion status indicator
(
rx_rmfifodatainserted
) in non-PCI Express (PIPE) functional modes.
rx_dataoutfull[14:13]
: PCI Express (PIPE) functional mode (
rx_pipestatus
)
rx_dataoutfull[15]
: 8B/10B running disparity indicator (
rx_runningdisp
)
10-bit FPGA fabric-Transceiver
Channel Interface
rx_dataoutfull[9:0]
: 10-bit un-encoded data (
rx_dataout
)
rx_dataoutfull[10]
:
rx_syncstatus
rx_dataoutfull[11]
: 8B/10B disparity error indicator (
rx_disperr
)
rx_dataoutfull[12]
:
rx_patterndetect
rx_dataoutfull[13]
: Rate Match FIFO deletion status indicator
(
rx_rmfifodatadeleted
) in non-PCI Express (PIPE) functional modes
rx_dataoutfull[14]
: Rate Match FIFO insertion status indicator
(
rx_rmfifodatainserted
) in non-PCI Express (PIPE) functional modes
rx_dataoutfull[15]
: 8B/10B running disparity indicator (
rx_runningdisp
)

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