Contents
iv
L
EDSVS9332P-D21 EN 3.0
7.5.46 Digital frequency processing (DFSET) 7-185...........................................
7.5.46.1 Setpoint conditioning with stretching and gearbox factor 7-186...................
7.5.46.2 Processing of correction values 7-187......................................
7.5.46.3 Synchronising to zero track or touch probe 7-188.............................
7.5.47 Delay elements (DIGDEL) 7-189....................................................
7.5.47.1 On-delay 7-190......................................................
7.5.47.2 Dropout delay 7-190...................................................
7.5.47.3 General delay 7-191...................................................
7.5.48 Freely assignable digital inputs (DIGIN) 7-192..........................................
7.5.49 Freely assignable digital outputs (DIGOUT) 7-193.......................................
7.5.50 Free analog display code (DISA) 7-194...............................................
7.5.51 Free phase display code (DISPH) 7-196..............................................
7.5.52 First order derivative-action element (DT1) 7-197.......................................
7.5.53 Free piece counter (FCNT) 7-198...................................................
7.5.54 Free codes (FCODE) 7-201........................................................
7.5.55 Free digital outputs (FDO) 7-202....................................................
7.5.56 Freely assignable input variables (FEV AN) 7-204........................................
7.5.57 Fixed setpoints (FIXSET) 7-211.....................................................
7.5.57.1 Enabling of the FIXSET1 setpoints 7-212....................................
7.5.58 Flipflop element (FLIP) 7-213......................................................
7.5.59 Limiter (LIM) 7-216.............................................................
7.5.60 Internal motor control (MCTRL) 7-217................................................
7.5.60.1 Current controller 7-219................................................
7.5.60.2 Additional torque setpoint 7-219..........................................
7.5.60.3 Torque limitation 7-220................................................
7.5.60.4 Speed controller 7-221.................................................
7.5.60.5 Torque control with speed limitation 7-222..................................
7.5.60.6 Speed setpoint limitation 7-222..........................................
7.5.60.7 Phase controller 7-223.................................................
7.5.60.8 Quick stop QSP 7-224.................................................
7.5.60.9 Field weakening 7-225.................................................
7.5.60.10 Switching frequency changeover 7-225.....................................
7.5.61 Motor phase failure detection (MLP) 7-226............................................
7.5.62 Monitor outputs of monitoring system (MONIT) 7-227....................................
7.5.63 Motor potentiometer (MPOT) 7-228.................................................
7.5.64 Logic NOT 7-231...............................................................
7.5.65 Speed setpoint conditioning (NSET) 7-233............................................
7.5.65.1 Main setpoint path 7-234...............................................
7.5.65.2 JOG setpoints 7-235...................................................
7.5.65.3 Setpoint inversion 7-236................................................
7.5.65.4 S ramp 7-237.......................................................
7.5.65.5 Arithmetic operation 7-237..............................................
7.5.65.6 Additional setpoint 7-238...............................................
7.5.66 OR operation (OR) 7-239.........................................................
7.5.67 Oscilloscope function (OSZ) 7-242..................................................
7.5.68 Process controller (PCTRL1) 7-246..................................................
7.5.68.1 Control characteristic 7-247.............................................
7.5.68.2 Ramp function generator 7-248..........................................
7.5.68.3 Value range of the output signal 7-248.....................................
7.5.68.4 Evaluation of the output signal 7-248......................................
7.5.68.5 Deactivation of the process controller 7-248.................................
7.5.69 Signal adaptation for phase signals (PHDIV) 7-249......................................
To Next Page
Loading...
