Panasonic FP Series - Page 494

Arithmetic instructions
493
Part III FP Instructions
For Relay T/C Register Constant
s WX WY WR WL SV EV DT LD FL dec. or hex.
d1 - WY WR WL SV EV DT LD FL -
No. IEC address Set If
R9007 %MX0.900.7 permanently
R9008 %MX0.900.8 for an instant
 the size (n) of the FIFO specified by d1 is
n = 0, or when n > 256.
 the number of stored data items of the
FIFO = 0.
 the number of stored data items of the
FIFO > FIFO size (n).
 the final address of the FIFO based on
the FIFO size (n) exceeds the area.
 the FIFO writing pointer > FIFO size (n).
 the FIFO writing pointer is 256 (16#100)
or higher after the data has been written.
 An error occurs if this is executed when the FIFO buffer is full (the
number of stored data items = the size n of the FIFO defined by the
FIFT instruction). Writing is inhibited.
 If this is executed when the writing pointer is indicating the final
address in the FIFO buffer (the "n" value defined by the FIFT
instruction), the writing pointer will be set to 0.
Operands
Error flags
Example
This example illustrates the FIFO buffer by incorporating the functions F115_FIFT (see page 483),
F116_FIFR (see page 487) and F117_FIFW (see page 491). The function has been programmed
in ladder diagr
am (LD) and structured text (ST).
DUT
POU header
All input and output variables used for programming this function have been declared in the POU
header.