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Panasonic FP Series

Panasonic FP Series
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Timer instructions
328
Part II IEC Instructions
TP
Timer with defined period
To add an enable input and enable output to the instruction, select [With EN/ENO] from the
"Instructions" pane (LD, FBD or IL editor). To reuse an instruction select "Recently used" from the
context menu or press <Ctrl>+<Shift>+<v> in the programming window.
For TP declare the following:
IN clock generator
if a rising edge is detected at IN, a clock is generated having the period
defined in PT
PT clock period
(16-bit value: 0 - 327.27s, 32-bit value: 0 -21,474,836.47s; resolution 10ms
each) a timer having the period PT is caused for each rising edge at IN. A
new rising edge detected at IN within the pulse period does not cause a new
timer (see time chart, section
2
)
Q signal output
is set for the period of PT as soon as a rising edge is detected at IN
ET elapsed time
contains the elapsed period of the timer. If PT = ET, Q will be reset
FP2, FP2SH and FP10SH use a 32-bit value for PT.
Time
chart
t
0
t
1+PT
t
2
t
3
t
4
t
4
+ PT
t
0
t
1+PT
t
2
t
2
+ PT t
4
t
4
+ PT
t
0
t
1
t
2
t
3
t
4
t
5
t
6
t
7
IN
Q
ET
PT
1
t
2 3
1
+
2
Independent of the turn-on period of the IN signal, a clock is generated at the output
Q having a length defined by PT. The function block TP is triggered if a rising edge
is detected at the input IN.
3
A rising edge at the input IN does not have any influence during the processing of
PT.
PLC types Availability of TP (see page 1332)
Description
The function block TP allows you to program a pulse timer with a defined clock period.

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