Altera Stratix - V 2× AGP - Intel Corporation Accelerated Graphics Port Interface Specification 2.0; GTL - EIA;JEDEC Standard EIA;JESD8-3; Gtl

4–8 Altera Corporation
Stratix Device Handbook, Volume 2 June 2006
Stratix & Stratix GX I/O Standards
3.3-V 2× AGP - Intel Corporation Accelerated Graphics Port
Interface Specification 2.0
The 2× AGP I/O standard is a voltage-referenced, single-ended standard
used for 3.3-V graphics applications. The 2× AGP input standard
specifies an input voltage range of – 0.5V ≤V
I
≤V
CCIO
+ 0.5V. The 2× AGP
standard does not require board terminations. Stratix and Stratix GX
devices support both input and output levels.
GTL - EIA/JEDEC Standard EIA/JESD8-3
The GTL I/O standard is a low-level, high-speed back plane standard
used for a wide range of applications from ASICs and processors to
interface logic devices. The GTL standard defines the DC interface
parameters for digital circuits operating from power supplies of 2.5, 3.3,
and 5.0 V. The GTL standard is an open-drain standard, and Stratix and
Stratix GX devices support a 2.5- or 3.3-V V
CCIO
to meet this standard.
GTL requires a 0.8-V V
REF
and open-drain outputs with a 1.2-V V
TT
(see
Figure 4–4). Stratix and Stratix GX devices support both input and output
levels.
Figure 4–4. GTL Termination
GTL+
The GTL+ I/O standard is used for high-speed back plane drivers and
Pentium processor interfaces. The GTL+ standard defines the DC
interface parameters for digital circuits operating from power supplies of
2.5, 3.3, and 5.0 V. The GTL+ standard is an open-drain standard, and
Stratix and Stratix GX devices support a 2.5- or 3.3-V V
CCIO
to meet this
standard. GTL+ requires a 1.0-V V
REF
and open-drain outputs with a
1.5-V V
TT
(see Figure 4–5). Stratix and Stratix GX devices support both
input and output levels.
Output Buffer
Input Buffe
r
V
TT
= 1.2 V
50 Ω
Z = 50 Ω
V
REF
= 0.8 V
V
TT
= 1.2 V
50 Ω