Altera Stratix - Software Implementation; Conclusion

Altera Corporation 9–13
July 2005 Stratix Device Handbook, Volume 2
Implementing SFI-4 in Stratix & Stratix GX Devices
Software Implementation
The SFI-4 interface uses a 16-bit LVDS I/O interface. The Altera
®
Quartus
®
II software version 2.0 supports Stratix and Stratix GX devices,
allowing you to implement LVDS I/O buffers through the Quartus II
Assignment Organizer.
f For information on the Quartus II Assignment Organizer, see the
Quartus II Software Help.
Conclusion
SFI-4 is the standard interface between SONET framers and optical
SERDES for OC-192 interfaces. With embedded SERDES and fast PLLs,
Stratix and Stratix GX devices can easily support the SFI-4 framer
interface, enabling
10-Gbps (OC-192) data transfer rates. Stratix and Stratix GX I/O supports
the required data rates of up to 622.08 Mbps. Stratix and Stratix GX fast
PLLs are designed to support the high clock frequencies and one-to-one
relationship needed for interfaces such as XSBI and SFI-4. Stratix and
Stratix GX devices can support multiple SFI-4 functions on one device.
Table 9–7. Framer LVDS DC Specifications
Parameter
Value
Unit
Min Typ Max
Output differential voltage (V
OD
) 250 600 (1) mV
Output offset voltage (V
OS
) 1,125 1,375 mV
Output Impedance, single ended 40 140 W
Change in V
OD
between ‘0’ and '1' 50 mV
Change in V
OD
between '1' and '0' 50 mV
Input voltage range (V
I
) 0 2,400 mV
Differential impedance 100 W
Input differential voltage (V
ID
) 100 600 mV
Receiver differential input impedance 70 130 W
Ground potential difference (between PCS and PMA) 50 mV
Rise and fall times (20% to 80%) 100 400 ps
Note to Ta bl e 9 –7 :
(1) The IEEE standard requires 400 mV. A larger swing is encouraged, but not required.