Altera Stratix - Mixed-Port Read-During-Write Mode

2–26 Altera Corporation
Stratix Device Handbook, Volume 2 July 2005
Read-During-Write Operation at the Same Address
When using byte enables in true dual-port RAM mode, the outputs for
the masked bytes on the same port are unknown. (See Figure 2–1 on
page 2–6.) The non-masked bytes are read out as shown in Figure 2–15.
Figure 2–15. Same-Port Read-During-Write Functionality Note (1)
Note to Figure 2–15:
(1) Outputs are not registered.
Mixed-Port Read-During-Write Mode
This mode is used when a RAM in simple or true dual-port mode has one
port reading and the other port writing to the same address location with
the same clock.
The READ_DURING_WRITE_MODE_MIXED_PORTS parameter for M512
and M4K memory blocks determines whether to output the old data at
the address or a “don’t care” value. Setting this parameter to OLD_DATA
outputs the old data at that address. Setting this parameter to DONT_CARE
outputs a “don’t care” or unknown value. See Figures 2–16 and 2–17 for
sample functional waveforms showing this operation. These figures
assume that the outputs are not registered.
The DONT_CARE setting allows memory implementation in any TriMatrix
memory block. The OLD_DATA setting restricts memory implementation
to only M512 or M4K memory blocks. Selecting DONT_CARE gives the
compiler more flexibility when placing memory functions into TriMatrix
memory.
inclock
data_in
wren
data_out
A
BA
Old