10–10 Altera Corporation
Stratix Device Handbook, Volume 2 July 2005
TriMatrix Memory
APEX 20K design contains flow-through memory, you must modify the
memory modules to target the Stratix and Stratix GX architectures (see
“Memory Megafunctions” on page 10–12 for more information).
f For more information about TriMatrix memory and converting flow-
through memory modules to pipelined, see the TriMatrix Embedded
Memory Blocks in Stratix & Stratix GX Devices chapter in the Stratix GX
Device Handbook and AN 210: Converting Memory from Asynchronous to
Synchronous for Stratix & Stratix GX Designs.
Same-Port Read-During-Write Mode
In same-port read-during-write mode, the RAM block can be in single-
port, simple dual-port, or true dual-port mode. One port from the RAM
block both reads and writes to the same address location using the same
clock. When APEX II or APEX 20K devices perform a same-port read-
during-write operation, the new data is available on the falling edge of
the clock cycle on which it was written, as shown in Figure 10–4. When
Stratix and Stratix GX devices perform a same-port read-during-write
operation, the new data is available on the rising edge of the same clock
cycle on which it was written, as shown in Figure 10–5. This holds true for
all TriMatrix memory blocks.
Figure 10–4. Falling Edge Feed-Through Behavior
(APEX II & APEX 20K Devices) Note (1)
Note to Figure 10–4:
(1) Figures 10–4 and 10–5 assume that the address stays constant throughout and that
the outputs are not registered.
inclock
data_in
wren
data_out
A
BA
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