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Altera Stratix - Read;Write Clock Mode

Altera Stratix
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Altera Corporation 2–21
July 2005 Stratix Device Handbook, Volume 2
TriMatrix Embedded Memory Blocks in Stratix & Stratix GX Devices
Read/Write Clock Mode
The TriMatrix memory blocks can implement read/write clock mode for
simple dual-port memory. This mode can use up to two clocks. The write
clock controls the block’s data inputs, wraddress, and wren. The read
clock controls the data output, rdaddress, and rden. The memory
blocks support independent clock enables for each clock and
asynchronous clear signals for the read- and write-side registers.
Figure 2–12 shows a memory block in read/write clock mode.

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