4–28 Altera Corporation
Stratix Device Handbook, Volume 2 June 2006
I/O Termination
You can power up or power down the V
CCIO
and V
CCINT
pins in any
sequence. The power supply ramp rates can range from 100 ns to 100 ms.
During hot socketing, the I/O pin capacitance is less than 15 pF and the
clock pin capacitance is less than 20 pF.
DC Hot Socketing Specification
The hot socketing DC specification is | I
IOPIN
| < 300 μ A.
AC Hot Socketing Specification
The hot socketing AC specification is | I
IOPIN
| < 8 mA for 10 ns or less.
This specification takes into account the pin capacitance, but not board
trace and external loading capacitance. Additional capacitance for trace,
connector, and loading must be considered separately.
I
IOPIN
is the current at any user I/O pin on the device. The DC
specification applies when all VCC supplies to the device are stable in the
powered-up or powered-down conditions. For the AC specification, the
peak current duration because of power-up transients is 10 ns or less. For
more information, refer to the Hot-Socketing & Power-Sequencing Feature &
Testing for Altera Devices white paper.
I/O Termination
Although single-ended, non-voltage-referenced I/O standards do not
require termination, Altera recommends using external termination to
improve signal integrity where required.
The following I/O standards do not require termination:
■ LVTTL
■ LVCMOS
■ 2.5 V
■ 1.8 V
■ 1.5 V
■ 3.3-V PCI/Compact PCI
■ 3.3-V PCI-X 1.0
■ 3.3-V AGP 1×
Voltage-Referenced I/O Standards
Voltage-referenced I/O standards require both an input reference
voltage, V
REF,
and a termination voltage, V
TT
. Off-chip termination on the
board should be used for series and parallel termination.
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