Altera Stratix - Using MultiVolt I;O Pins

14–2 Altera Corporation
Stratix Device Handbook, Volume 2 January 2005
Using MultiVolt I/O Pins
Using MultiVolt
I/O Pins
Cyclone FPGAs require a 1.5-V V
CCINT
and a 3.3-V, 2.5-V, 1.8-V, or 1.5-V
I/O supply voltage level (V
CCIO
). All pins, including dedicated inputs,
clock, I/O, and JTAG pins, are 3.3-V tolerant before and after V
CCINT
and
V
CCIO
are powered.
When V
CCIO
is connected to 1.5-V, the output is compatible with 1.5-V
logic levels. The output pins can be made 1.8-V, 2.5-V, or 3.3-V compatible
by using open-drain outputs pulled up with external resistors. You can
use external resistors to pull open-drain outputs up with a 1.8-V, 2.5-V, or
3.3-V V
CCIO
. Table 14–1 summarizes Cyclone MultiVolt I/O support.
Table 14–1. Cyclone MultiVolt I/O Support Note (1)
V
CCIO
(V)
Input Signal Output Signal
1.5-V 1.8-V 2.5-V 3.3-V 5.0-V 1.5-V 1.8-V 2.5-V 3.3-V 5.0-V
1.5-V
vv
v (2) v (2)
v
1.8-V
vvv
v (3)
v
2.5-V
vv
v (5) v (5)
v
3.3-V v (4)
v
v (6) v (7) v (7) v (7)
v
v (8)
Notes to Table 14–1:
(1) The PCI clamping diode must be disabled to drive an input with voltages higher than V
CCIO
.
(2) When V
CCIO
= 1.5-V and a 2.5-V or 3.3-V input signal feeds an input pin, higher pin leakage current is expected.
(3) When V
CCIO
= 1.8-V, a Cyclone device can drive a 1.5-V device with 1.8-V tolerant inputs.
(4) When V
CCIO
= 3.3-V and a 2.5-V input signal feeds an input pin, the V
CCIO
supply current will be slightly larger
than expected.
(5) When V
CCIO
= 2.5-V, a Cyclone device can drive a 1.5-V or 1.8-V device with 2.5-V tolerant inputs.
(6) Cyclone devices can be 5.0-V tolerant with the use of an external resistor and the internal PCI clamp diode.
(7) When V
CCIO
= 3.3-V, a Cyclone device can drive a 1.5-V, 1.8-V, or 2.5-V device with 3.3-V tolerant inputs.
(8) When V
CCIO
= 3.3-V, a Cyclone device can drive a device with 5.0-V LVTTL inputs but not 5.0-V LVCMOS inputs.