Altera Corporation 1–53
July 2005 Stratix Device Handbook, Volume 2
General-Purpose PLLs in Stratix & Stratix GX Devices
External Clock Output Power
Enhanced PLLs 5 and 6 also have isolated power pins for their dedicated
external clock outputs (VCC_PLL5_OUTA and VCC_PLL5_OUTB, or
VCC_PLL6_OUTA and VCC_PLL6_OUTB, respectively). PLLs 5 and 6 both
have two banks of outputs. Each bank is powered by a unique output
power, OUTA or OUTB, as illustrated in Figure 1–25. These outputs can by
powered by 3.3, 2.5, 1.8, or 1.5 V depending on the I/O standard for the
clock output in the A or B groups.