Altera Stratix - Page 401

Altera Corporation 10–9
July 2005 Stratix Device Handbook, Volume 2
Transitioning APEX Designs to Stratix & Stratix GX Devices
Table 10–4 compares TriMatrix memory with ESBs.
Stratix and Stratix GX TriMatrix memory blocks only support pipelined
mode, while APEX II and APEX 20K ESBs support both pipelined and
flow-through modes. Since all TriMatrix memory blocks can be
pipelined, all input data and address lines are registered, while outputs
can be either registered or combinatorial. You can use Stratix and
Stratix GX memory block registers to implement input and output
registers without utilizing additional resources. You can compile designs
containing pipelined memory blocks (inputs registered) for Stratix and
Stratix GX devices without any modifications. However, if an APEX II or
Table 10–4. Stratix & Stratix GX TriMatrix Memory Blocks vs. APEX II & APEX 20K ESBs
Features
Stratix & Stratix GX
APEX II ESB APEX 20K ESB
M512 RAM M4K RAM M-RAM
Size (bits) 576 4,608 589,824 4,096 2,048
Parity bits Yes Yes Yes No No
Byte enable No Yes Yes No No
True dual-port
mode
No Yes
Includes support
for mixed width
Ye s
Includes support
for mixed width
Ye s
Includes support
for mixed width
No
Embedded shift
register
Yes Yes No No No
Dedicated
content-
addressable
memory (CAM)
support
No No No Yes Yes
Pre-loadable
initialization with a
.mif (1)
Ye s Ye s N o Ye s Ye s
Packed mode (2) No Yes No Yes Yes
Feed-through
behavior
Rising edge Rising edge Rising edge Falling edge Falling edge
Output power-up
condition
Powers up
cleared even if
using a .mif (1)
Powers up
cleared even if
using a .mif (1)
Powers up with
unknown state
Powers up
cleared or to
initialized value,
if using a .mif (1)
Powers up
cleared or to
initialized value,
if using a .mif (1)
Notes to Table 10–4:
(1) .mif: Memory Initialization File.
(2) Packed mode refers to combining two single-port RAM blocks into a single RAM block that is placed into true
dual-port mode.