Altera Stratix - Page 154

4–18 Altera Corporation
Stratix Device Handbook, Volume 2 June 2006
Stratix & Stratix GX I/O Banks
standards in addition to differential SSTL-2 and HSTL (both on the output
clock only). Since Stratix devices support both non-voltage-referenced
and voltage-referenced I/O standards, there are different guidelines
when working with either separately or when working with both.
Table 4–2. I/O Standards Supported in Stratix I/O Banks (Part 1 of 2)
I/O Standard
I/O Bank
Enhanced PLL External
Clock Output Banks
123456789101112
3.3-V LVTTL/LVCMOS
vvvvvvvvvvvv
2.5-V LVTTL/LVCMOS
vvvvvvvvvvvv
1.8-V LVTTL/LVCMOS
vvvvvvvvvvvv
1.5-V LVCMOS
vvvvvvvvvvvv
PCI/PCIX//Compact PCI
vv vvvvvv
AGP 1×
vv vvvvvv
AGP 2×
vv vvvvvv
SSTL-3 Class I
vvvvvvvvvvvv
SSTL-3 Class II
vvvvvvvvvvvv
SSTL-2 Class I
vvvvvvvvvvvv
SSTL-2 Class II
vvvvvvvvvvvv
SSTL-18 Class I
vvvvvvvvvvvv
SSTL-18 Class II
vv vvvvvv
Differential SSTL-2
(output clocks)
vvvv
HSTL Class I
vvvvvvvvvvvv
1.5-V HSTL Class I
vvvvvvvvvvvv
1.8-V HSTL Class I
vvvvvvvvvvvv
HSTL Class II
vv vvvvvv
1.5-V HSTL Class II
vv vvvvvv
1.8-V HSTL Class II
vv vvvvvv
Differential HSTL (input
clocks)
vvvvvvvv
Differential HSTL (output
clocks)
vvvv
GTL
vv vvvvvv