Altera Stratix - Page 375

Altera Corporation 8–23
July 2005 Stratix Device Handbook, Volume 2
Implementing 10-Gigabit Ethernet Using Stratix & Stratix GX Devices
Figure 8–17. Electrical Characteristics for Stratix & Stratix GX Devices
(1.5-V HSTL Class I)
V
REF
C
L
= 20pF
V
IN
V
OUT
R
T
= 50 Ω
V
TT
Output Buffer
Input Buffer
t
z
(min) = 1 V/ns
t
PD
HSTL AC Load Circuit for Class I
HSTL AC Waveform & I/O Interface
t
f
(min) = 1 V/ns
V
SWING
= 1.0 V
Input
Output
Tri-Stated
Output
t
PL2
t
PH2
80% V
SWING
V
REF
20% V
SWING
V
OH
= V
CCN
− 0.4 V = 1.1 V
V
TT
= V
CCN
/2 = 0.75 V
V
OL
= 0.4 V
V
IH(AC)
= 0.95 V
V
TT
= 0.75 V
V
IL(AC)
= 0.55 V