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Altera Stratix
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12–26 Altera Corporation
Stratix Device Handbook, Volume 2 September 2004
Using Enhanced Configuration Devices
3. Select the enhanced configuration device (EPC4, EPC8, EPC16), and
the mode used (1-bit Passive Serial or Fast Passive Parallel). Only
during the initial programming file generation can you specify the
Options, Configuration device, or Mode settings. While generating
the partial programming file, all of these settings are grayed out and
inaccessible.
4. In the Input files to convert box, highlight SOF Data at Page 0 and
click Add File. Select input SOF file(s) for this configuration page
and insert them.
5. Repeat Step 4 for the Page 1 application configuration page.
6. For enabling block addressing, select the SOF Data entry for Page 1,
and click Properties. This opens the SOF Data Properties dialog
box (see Figure 12–15).
7. Pick Block from the Address Mode drop down selection, and enter
32-bit Hexadecimal byte address for block Starting Address and
Ending Address. Note that for partial programming support, the
block start and end addresses should be aligned to a flash sector
boundary. This prevents two configuration pages from overlapping
within the same flash boundary. See the flash memory datasheet for
data sector boundary information. Click OK to save SOF data
properties.
8. Check the Memory Map File box to generate a memory map output
file that specifies the start/end addresses of each configuration page
and user data blocks.
9. Save the CPF setup (optionally), by selecting Save Conversion
Setup… and specifying a name for the COF output file.
10. Click OK to generate initial programming and memory map files.

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